VLSI Design and Comparative Analysis of Several Types of Fixed and Simple Precision Floating Point Multipliers

Autores/as

  • Abimael Jiménez Pérez Universidad Autónoma de Ciudad Juárez Instituto de Ingeniería y Tecnología. Departamento de Ingeniería Eléctrica y Computación Av. del Charro 450​ C. P. , 32310 Juárez, Chihuahua, México http://orcid.org/0000-0002-9514-4570
  • Marco Antonio Gurrola Navarro Universidad de Guadalajara Centro Universitario de Ciencias Exactas e ingenierías. Blvd. Marcelino García Barragán 1421, 44430. Guadalajara, Jalisco, México.
  • Víctor Manuel Valenzuela De la Cruz Intel Guadalajara
  • José Antonio Muñoz Gómez Universidad de Guadalajara Departamento de Ingenierías Av. Independencia Nacional No. 151, 48900. Autlán, Jalisco, Mexico http://orcid.org/0000-0002-8724-8302
  • Omar Aguilar Loreto Universidad de Guadalajara Departamento de Ingenierías Av. Independencia Nacional No. 151, 48900. Autlán, Jalisco, Mexico http://orcid.org/0000-0002-0395-0066

DOI:

https://doi.org/10.20983/culcyt.2021.1.2.4

Palabras clave:

VLSI integrated circuit, VHDL, Booth-2, Wallace tree, floating-point

Resumen

Multiplication is an arithmetic operation that has a meaningful impact on the performance of several real-life applications, such as digital signal and image processing. Analysis and comparison of different types of fixed-point multipliers such as Wallace tree, array, and Booth-2 with truncated and non-truncated versions were included in this design. Fixed-point multipliers were used to design floating-point multipliers through a hardware description language. As a result, area and speed values were analyzed. Booth-2 fixed multiplier with truncation and RCA adders present both the longest delay and the largest area consumption. Wallace tree floating-point multiplier required the smallest area and the shortest delay. The 8-bit versions of fixed-point multipliers were physically synthesized, using the Alliance tools, to obtain the layout of the circuits. The integrated circuits were successfully fabricated in a 0.5-μm CMOS technology.

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Biografía del autor/a

Abimael Jiménez Pérez, Universidad Autónoma de Ciudad Juárez Instituto de Ingeniería y Tecnología. Departamento de Ingeniería Eléctrica y Computación Av. del Charro 450​ C. P. , 32310 Juárez, Chihuahua, México

Profesor Titular C

 

Marco Antonio Gurrola Navarro, Universidad de Guadalajara Centro Universitario de Ciencias Exactas e ingenierías. Blvd. Marcelino García Barragán 1421, 44430. Guadalajara, Jalisco, México.

Profesor de Tiempo Completo

Departamento de Electrónica

 

José Antonio Muñoz Gómez, Universidad de Guadalajara Departamento de Ingenierías Av. Independencia Nacional No. 151, 48900. Autlán, Jalisco, Mexico

Profesor de Tiempo Completo

Departamento de Ingenierías


Omar Aguilar Loreto, Universidad de Guadalajara Departamento de Ingenierías Av. Independencia Nacional No. 151, 48900. Autlán, Jalisco, Mexico

Profesor de Tiempo Completo

Departamento de Ingenierías

 

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Publicado

2021-04-30 — Actualizado el 2021-08-26

Cómo citar

[1]
A. Jiménez Pérez, M. A. Gurrola Navarro, V. M. Valenzuela De la Cruz, J. A. Muñoz Gómez, y O. Aguilar Loreto, «VLSI Design and Comparative Analysis of Several Types of Fixed and Simple Precision Floating Point Multipliers», Cult. Científ. y Tecnol., vol. 18, n.º 1, pp. 1–9, ago. 2021.

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